引用本文:王鑫,许力,李晓,等.基于FPGA的GOOSE报文解析模块设计与实现[J].电力系统保护与控制,2015,43(24):101-107.
WANG Xin,XU Li,LI Xiao,et al.Design and realization of GOOSE decoding module based on FPGA[J].Power System Protection and Control,2015,43(24):101-107
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基于FPGA的GOOSE报文解析模块设计与实现
王鑫1, 许力2, 李晓2, 崔新友2
1.武汉邮电科学研究院，湖北 武汉 430074;2.武汉烽火富华电气有限责任公司，湖北 武汉 430074
摘要:
为了提高通用面向对象变电站事件(GOOSE)报文的传输实时性和可靠性性能，给出一种基于现场可编程逻辑门阵列(FPGA)的GOOSE报文快速有效解析的方法。利用FPGA的并行执行机制，设计并实现了GOOSE报文解析有限状态机与订阅检验判断流程。通过对实例的行为仿真及波形捕获，验证了设计在较大网络流量下能够实现过滤并快速解析GOOSE与链路自检的功能。相对于传统CPU的顺序执行处理方式，基于FPGA的变电站实时报文解析设计具有更高的实时性及可靠性，为过程层设备的设计与开发提供了新思路。
关键词:  GOOSE解析  FPGA  有限状态机  行为仿真  波形捕获
DOI：10.7667/j.issn.1674-3415.2015.24.016
分类号:
基金项目:
Design and realization of GOOSE decoding module based on FPGA
WANG Xin1, XU Li2, LI Xiao2, CUI Xinyou2
1.Wuhan Research Institute of Posts and Telecommunications, Wuhan 430074, China;2.Wuhan Fiber Home Fuhua Electric Co., Ltd., Wuhan 430074, China
Abstract:
In order to improve real-time and reliability performance of transmission of Generic Object Oriented Substation Event (GOOSE) packets, a fast and effective GOOSE decoding method based on Field Programmable Gate Array (FPGA) is given. Taking advantage of FPGA’s parallel execution mechanism, the finite state machine of GOOSE message decoding and the judging process of subscription checking are designed and realized. Through behavior simulation and waveform capture, it verifies functions of GOOSE filtration and fast decoding, and GOOSE link self-check in high network flows. Compared with the traditional CPU’s sequential processing mode, the FPGA-based design of real-time messages decoding in substation has better performance of real-time and reliability, which provides a new idea for design and development of process layer devices.
Key words:  GOOSE decoding  FPGA  finite state machine  behavior simulation  waveform capture
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