| 引用本文: | 徐青青,陈莹,刘莉,张锦.一种双正弦幅值积分器解耦锁相环的设计[J].电力系统保护与控制,2017,45(8):132-137.[点击复制] |
| XU Qingqing,CHEN Ying,LIU Li,ZHANG Jin.Design of decoupled double sinusoidal amplitude integrator phase-locked loop[J].Power System Protection and Control,2017,45(8):132-137[点击复制] |
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| 摘要: |
| 针对在电网三相电压不平衡时传统锁相环不能准确检测基波正序相位的问题，设计了一种双正弦幅值积分器解耦锁相环(decoupled double sinusoidal amplitude integrator phase-locked loop, DDSAI-PLL)。该锁相环利用正弦幅值积分器的频率选择特性，在αβ坐标系下采用正负序解耦结构实现了正序分量的完全提取。同时引入一阶负反馈系统作为频率自适应环节，使锁相环在电网频率发生偏移时仍然可以对基波正序频率进行准确估计。建立了DDSAI-PLL的数学模型，并对其关键参数进行了设计。最后使用DSP实现该锁相环，并在电压畸变条件下与传统的同步参考坐标系锁相环(SRF-PLL)进行了对比实验，结果证明了所提锁相方法的有效性。 |
| 关键词: 正弦幅值积分器 交叉解耦 数学建模 锁相环 DSP |
| DOI：10.7667/PSPC160658 |
| 投稿时间：2016-05-09修订日期：2016-06-17 |
| 基金项目:江苏省自然科学基金青年基金(BK20140586);江苏省教育厅高校自然科学基金(13KJD460007);宿迁市科技支撑计划项目(工业)(H201516);宿迁学院科研基金(2016KY27, 2014KY08) |
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| Design of decoupled double sinusoidal amplitude integrator phase-locked loop |
| XU Qingqing,CHEN Ying,LIU Li,ZHANG Jin |
| (Suqian College, Suqian 223800, China) |
| Abstract: |
| Under conditions of the distorted grid, the traditional phase-locked loop (PLL) cannot accurately extract fundamental positive sequence. For the problem, a decoupled double sinusoidal amplitude integrator phase-locked loop (DDSAI-PLL) is designed. DDSAI-PLL uses a crossing decoupling structure based on sine amplitude integrator (SAI), to achieve the separation of positive and negative sequence components. And the introduction of frequency adaptive module makes DDSAI-PLL have the phase frequency adaptive ability. The working principle of DDSAI-PLL is introduced, its mathematical model is established, and the key parameters are analyzed. Finally, DDSAI-PLL is realized by using DSP and is compared with the traditional synchronous reference frame phase locked loop (SRF-PLL) under the condition of voltage distortion. The results show that the proposed method is effective. This work is supported by Natural Science Foundation of China Youth Fund of Jiangsu Province (No. BK20140586), and Natural Science Foundation for Universities of Jiangsu Education Department (No. 13KJD460007), Suqian Science and Technology Support Program (Industry) (No. H201516), and Scientific Research Fund of Suqian College (No. 2016KY27 and No. 2014KY08). |
| Key words: sine amplitude integrator (SAI) cross decoupling mathematical modeling phase-locked loop (PLL) DSP |
