引用本文: | 李国庆,王一捷,熊毅.MMC-HVDC功率硬件在环仿真的SDIM-ITM接口算法与延时补偿[J].电力系统保护与控制,2019,47(3):56-63.[点击复制] |
LI Guoqing,WANG Yijie,XIONG Yi.SDIM-ITM interface algorithm and time delay compensation for a power hardware-in-the-loop simulation of MMC-HVDC[J].Power System Protection and Control,2019,47(3):56-63[点击复制] |
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摘要: |
针对功率接口硬件延时影响MMC-HVDC功率硬件在环仿真精确性问题,设计了一个模拟一阶RC高通滤波器的相位超前校正单元进行延时补偿。MMC采用戴维南等效电路模型,以便于计算SDIM接口中的实时阻尼阻抗和降低数字仿真计算量。MMC-HVDC功率硬件在环仿真采用SDIM-ITM接口,其中ITM接口作为驱动环节,SDIM接口作为观测环节,在运行点变化和故障条件下呈现出较高的稳定性和精确性。但接口延时(或功放延时)对物理侧仿真精度影响较大。故通过所设计的相位超前校正单元对激励功放的交流电压信号进行相位补偿,以进一步提高物理侧仿真精度。仿真结果验证了该延时补偿方法的有效性。 |
关键词: MMC-HVDC 功率硬件在环 SDIM-ITM接口 仿真精确性 延时补偿 |
DOI:10.7667/PSPC180162 |
投稿时间:2018-02-06修订日期:2018-05-23 |
基金项目:国家重点研发计划项目资助(2016YFB0900903);吉林省科技发展计划项目资助(20160307014GX) |
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SDIM-ITM interface algorithm and time delay compensation for a power hardware-in-the-loop simulation of MMC-HVDC |
LI Guoqing,WANG Yijie,XIONG Yi |
(School of Electrical Engineering, Northeast Electric Power University, Jilin 132012, China;Beijing Jingxi Gas-fired Thermal Power Corporation, Beijing 100041, China) |
Abstract: |
To deal with the accuracy problem of Power Hardware-In-the-Loop (PHIL) simulation for Modular Multilevel Converter-based HVDC (MMC-HVDC) caused by the power interface hardware, a phase-lead correction unit that simulates an first-order high-pass RC filter is designed for time delay compensation. In this paper, the MMC is modeled with Thevenin's equivalent circuit to derive the real time value of damping impedance for SDIM interface and reduce the calculation burden. The SDIM-ITM interface is adopted for MMC-HVDC PHIL simulation, where ITM interface acts as a driver and SDIM interface acts as an observer, and it shows high accuracy and stability under conditions of both change of operating point and fault. However, the physical simulation accuracy is influenced by the interface (or power amplifier) time delay. Thus the phase of AC voltage signal exciting power amplifier is compensated by the proposed phase-lead correction unit to further improve the physical simulation accuracy. The effectiveness of the proposed time delay compensation method is verified by simulation results. This work is supported by National Key Research and Development Program of China (No. 2016YFB0900903) and Science and Technology Development Plan of Jilin Province (No. 20160307014GX). |
Key words: MMC-HVDC PHIL SDIM-ITM interface simulation accuracy time delay compensation |